Papers

Publications

Over 50 papers, including 5 at ISSCC and 9 in JSSC — the top conference and journal in integrated circuits. We also publish at top venues in security, AI, robotics, and medical image analysis, and hold over 30 patents.

TypeYear

Journal30

2026Computing
A 65-nm Compute-in-Read-Only-Memory Macro With Bidirectional Ternary Weight Storage and Sparsity-Aware Local Accumulation for 1.58-bit LLM Inference
W. Zhang, X. Li, S. Ando, Z. Xu, K. Yoshioka
IEEE Transactions on Circuits and Systems I: Regular Papers
2026Computing
MCRA: Multi-Column Residue Accumulation Analog Compute-in-Memory Architecture with Time-Domain M-Input ΣΔ ADC
X. Li, W. Zhang, S. Ando, Z. Wang, J. Lin, K. Yoshioka
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Paper
2026Computing
ASiM: Improving Transparency of SRAM-based Analog Compute-in-Memory Research with an Open-Source Simulation Framework
W. Zhang, S. Ando, Y.-C. Chen, K. Yoshioka
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Paper GitHub
2026Sensing
LiDAR Beacon: 300 m-Range Fiducial Marker for Mobile Robot Localization with Dual Temporal Range–Reflectance Modulation
O. Sako, K. Koide, R. Nagata, K. Ikeda, R. Yoshida, K. Yoshioka
IEEE Sensors Journal
Paper Press
2025Sensing
Optical LiDAR Communication: Repurposing Existing LiDAR Sensors for Infrastructure-to-Vehicle Communication
K. Ikeda, Y. Hayakawa, R. Suzuki, S. Nagai, O. Sako, R. Nagata, R. Yoshida, K. Yoshioka
IEEE Robotics and Automation Letters (RA-L)
2025Sensing
From Lab to Road: Realizing and Detecting LiDAR Spoofing Attacks against Autonomous Vehicles at High-Speed and Long-Distance
R. Suzuki*, T. Sato*, Y. Hayakawa*, K. Ikeda, O. Sako, R. Nagata, R. Yoshida, Q. Chen, K. Yoshioka
IEEE Sensors Journal
* co-first authors
2025Sensing
Breaking the Shield: Systematic Security Analysis on Pulse Fingerprinting LiDAR Systems for Autonomous Driving
Y. Hayakawa*, T. Sato*, R. Suzuki*, K. Ikeda, O. Sako, R. Nagata, R. Yoshida, Q. Chen, K. Yoshioka
IEEE Sensors Journal
* co-first authors
2025Analog circuits
A 4.2–373 K Functional 800 MS/s 12 b Buffer-then-Amplify Charge-Pump-Based Pipelined TI-SAR ADC with Integrated Active-Hold Technique
K. Yamashita, K. Yoshioka*, C. Ziegler, V. Issakov, H. Ishikuro
IEEE Journal of Solid-State Circuits
* Corresponding author
2025Analog circuits
A High-Speed 8-Bit Single-Channel SAR ADC with Tailored Bit Intervals and Split Capacitors
X. Li, R. Wang, L. He, K. Yoshioka
Electronics
2025Analog circuits
A 0.6 V 68.2 dB 0.42 µW SAR-ΣΔ ADC for ASIC Chip in 0.18 µm CMOS
X. Li, K. Yoshioka, Z. Wang, J. Lin, C. Zhu
Electronics
2025Reviews
大規模言語モデルにおける半導体の課題と解決技術
吉岡健太郎
整形・災害外科 68巻12号
2024Computing
A Saliency-Aware Analog Computing In-Memory with SAR-Embedded Detection Achieving 18.5% Power Reduction
S. Ando, Y.-C. Chen, S. Miyagi, W. Zhang, K. Yoshioka
Japanese Journal of Applied Physics
2024Computing
A 818-4094 TOPS/W Capacitor-Reconfigured Analog CIM for Unified Acceleration of CNNs and Transformers
K. Yoshioka
IEEE Journal of Solid-State Circuits
2024Analog circuits
A 4.6 K to 400 K Functional Ringamp-Based 250 MS/s 12 b Pipelined ADC with PVT-Robust Unity-Gain-Frequency-Aware Bias Calibration
K. Yamashita, B. Hershberg, K. Yoshioka*, H. Ishikuro
IEEE Journal of Solid-State Circuits, Vol.59, Issue 3, pp.740-752
* Corresponding author
2024Reviews
A Review of SRAM-based Compute-in-Memory Circuits
K. Yoshioka, S. Ando, S. Miyagi, Y.-C. Chen, W. Zhang
Japanese Journal of Applied Physics
Most popular paper in the journal
2023Sensing
深層学習と民生用3Dセンサを用いた低コスト高精度肘関節可動域自動計測の試み
鈴木諒, 吉岡健太郎, 速川湧気, 中原龍一, 那須義久, 西田圭一郎, 尾崎敏文
中国四国整形外科会誌, Vol.35, No.2, pp.219-224
2023Sensing
完全Web化された医工連携の試み：関節可動域自動計測システムの開発
速川湧気, 吉岡健太郎, 鈴木諒, 中原龍一, 那須義久, 西田圭一郎, 尾崎敏文
中国四国整形外科会誌, Vol.35, No.2, pp.225-230
2023Reviews
Towards Reliable LiDARs for Autonomous Driving: A Review of High-Resolution and Security Features
K. Yoshioka
The Review of Laser Engineering
2022Sensing
Artificial intelligence for diagnosis and Gleason grading of prostate cancer: the PANDA challenge
W. Bulten et al.
Nature Medicine, Vol.28, pp.154–163
Open Access
2022Analog circuits
Time-Based Current Source: A Highly Digital Robust Current Generator for Switched Capacitor Circuits
K. Yoshioka
IEICE Transactions on Electronics
2022Reviews
A Tutorial and Review of Automobile Direct ToF LiDAR SoCs: Evolution of Next-Generation LiDARs
K. Yoshioka
IEICE Transactions on Electronics
Open Access · 2nd most popular paper in the journal
2021Analog circuits
VCO-based Comparator: A Fully Adaptive Noise Scaling Comparator for High-Precision and Low-Power SAR ADCs
K. Yoshioka
IEEE Transactions on VLSI Systems, Vol.29, Issue 12, pp.2143-2152
Top-10 popular paper in the journal
2020Sensing
A 240×192 Pixel 10fps 70klux 225m-Range Automotive LiDAR SoC Using a 40ch 0.0036mm² Voltage/Time Dual-Data-Converter-Based AFE
S. Kondo, H. Kubota, H. Katagiri, Y. Ota, M. Hirono, T. T. Ta, H. Okuni, S. Ohtsuka, Y. Ojima, T. Sugimoto, H. Ishii, K. Yoshioka, K. Kimura, A. Sai, N. Matsumoto
IEEE Journal of Solid-State Circuits
2019Computing
An 8 Bit 12.4 TOPS/W Phase-Domain MAC Circuit for Energy-Constrained Deep Learning Accelerators
Y. Toyama, K. Yoshioka, K. Ban, S. Maya, A. Sai, K. Onizuka
IEEE Journal of Solid-State Circuits, Vol. 54, Issue 10, pp.2730-2742
2019Analog circuits
Digital Amplifier: A Power-Efficient and Process-Scaling Amplifier for Switched Capacitor Circuits
K. Yoshioka, T. Sugimoto, N. Waki, S. Kim, D. Kurose, H. Ishii, M. Furuta, A. Sai, H. Ishikuro, T. Itakura
IEEE Transactions on VLSI Systems, Vol.27, Issue 11, pp.2575-2586
2018Sensing
A 20-ch TDC/ADC Hybrid Architecture LiDAR SoC for 24096 Pixel 200-m Range Imaging With Smart Accumulation Technique and Residue Quantizing SAR ADC
K. Yoshioka et al.
IEEE Journal of Solid-State Circuits, Vol. 53, Issue 11, pp.3026-3038
2018Analog circuits
An 802.11ax 4×4 Spectrum-Efficient WLAN AP Transceiver SoC Supporting 1024QAM with Frequency-Dependent IQ Calibration and Integrated Interference Analyzer
S. Kawai, K. Yoshioka et al.
IEEE Journal of Solid-State Circuits, Vol. 53, Issue 11, pp.442-444
2015Analog circuits
Dynamic Architecture and Frequency Scaling in 0.8–1.2 GS/s 7 b Subranging ADC
K. Yoshioka, R. Saito, T. Danjo, S. Tsukamoto, H. Ishikuro
IEEE Journal of Solid-State Circuits, Vol. 50, Issue 4, pp.932-945
2014Analog circuits
An 8 bit 0.3–0.8 V 0.2–40 MS/s 2-bit/step SAR ADC with Successively Activated Threshold Configuring Comparators in 40 nm CMOS
K. Yoshioka, A. Shikata, R. Sekimoto, T. Kuroda, H. Ishikuro
IEEE Transactions on VLSI Systems, Vol. 23, Issue 2, pp.356-368
2013Analog circuits
A 0.5-V 5.2-fJ/conversion-step Full Asynchronous SAR ADC with Leakage Power Reduction down to 650 pW by Boosted Self-Power Gating in 40-nm CMOS
R. Sekimoto, A. Shikata, K. Yoshioka, T. Kuroda, H. Ishikuro
IEEE Journal of Solid-State Circuits, Vol. 48, Issue 11, pp.2628-2636

Conference52

2026Computing
Detect in Any Scene: An Agentic Framework for Object Detection with Experience-Aware Reasoning
W. Zhang, J. Yin, K. Yoshioka
arXiv preprint
arXiv
2026Computing
The First CMOS-Integrated Stochastic Processing Unit for Scalable Thermodynamic Computing in 65nm with 1000x Power Efficiency Improvement
R. Sugawara, K. Yoshioka
SSDM
2026Computing
Dual-Purpose Spinning Current Circuit for Simultaneous Offset Cancellation and EMI Attack Detection in Hall-Effect Current Sensors
S. Horie, K. Yoshioka
APCCAS
2026Computing
SNNQ: Post-Training Quantization Towards Ultra Low-Bit and Fast Spiking Neural Networks
W. Zhang, K. Yoshioka
ISCAS
2026ComputingAcc. 30%
D4C: Data-free Quantization for Contrastive Language-Image Pre-training Models
W. Zhang, Y. Zhong, Z. Ding, X. Li, K. Yoshioka
CVPR (Findings)
arXiv
2026ComputingExcellent Student Author Award
BitROM: Weight Reload-Free CiROM Architecture Towards Billion-Parameter 1.58-bit LLM Inference
W. Zhang, X. Li, S. Ando, K. Yoshioka
ASP-DAC
arXiv GitHub
2026SensingAcc. 33%
Lights, Camera, Malfunction: When Illumination Robustness Leaves VLA Models Blind to Color
M. Watanabe, T. Sato, K. Yoshioka
CoRL
arXiv
2026SensingAcc. 25%
Towards Real-Time Full-Waveform LiDAR Transformers via Intensity-Guided Token Reduction and Physics-Aware Augmentation
K. Oishi*, K. Ikeda*, R. Hara, R. Yoshida, M. Isogawa, K. Yoshioka
NeurIPS
* co-first authors · Collaboration with Isogawa Group
2026SensingAcc. 25%MIRU Outstanding Student Award
Neural Reconstruction of LiDAR Point Clouds under Jamming Attacks via Full-Waveform Representation and Simultaneous Laser Sensing
R. Yoshida, T. Sato, W. Zhang, Y. Hayakawa, S. Nagai, T. Kado, T. Beppu, K. Yoshioka
NeurIPS
arXiv
2026SensingBest Demo Award
Demo: Controlling Depth Estimation in Stereo Cameras with Projected Patterns
T. Ishizue, N. Costagliola, S. Varma, O. Sako, K. Yoshioka, T. Sugawara, S. Rampazzi
VehicleSec
2026Sensing
Demo: Real-World Reconstruction of LiDAR Perception under Jamming Attacks
R. Yoshida, T. Sato, W. Zhang, Y. Hayakawa, S. Nagai, K. Yoshioka
VehicleSec
2026SensingAcc. 15%
Illusion of Depth: Revealing Hidden Stereo Vision Vulnerabilities in Depth Estimation
H. Bhupathiraju, T. Ishizue, N. Costagliola, O. Sako, K. Yoshioka, T. Sugawara, S. Rampazzi
ACM CCS
2026SensingAcc. 25%
Ghost-FWL: A Large-Scale Full-Waveform LiDAR Dataset for Ghost Detection and Removal
K. Ikeda*, R. Hara*, R. Nagata, O. Sako, Z. Ding, T. Kado, I. Fujioka, T. Beppu, M. Isogawa, K. Yoshioka
CVPR (Main)
* co-first authors · Collaboration with Isogawa Group and Sony
Paper arXiv GitHub Project
2026Sensing
D-SLAMSpoof: An Environment-Agnostic LiDAR Spoofing Attack using Dynamic Point Cloud Injection
R. Nagata, K. Koide, K. Ikeda, O. Sako, K. Yoshioka
IROS
arXiv
2026Sensing
MirrorDrift: Actuated Mirror-Based Attacks on LiDAR SLAM
R. Nagata, K. Koide, K. Ikeda, O. Sako, S. Horie, K. Yoshioka
IROS
arXiv
2025Computing
HEMA-CIM: A Dual-Macro Hybrid-Domain CIM Architecture for Energy-Efficient FP MAC Operations in Edge AI
Y. Yan, S. Li, W. Zhang, X. Si, K. Yoshioka
IEEE ICCE-Asia
Collaboration with Southeast University
2025Computing
AHCPTQ: Accurate and Hardware-Compatible Post-Training Quantization for Segment Anything Model
W. Zhang, Y. Zhong, S. Ando, K. Yoshioka
ICCV
Paper GitHub
2025Computing
A 4541 TOPS/W Saliency-Aware Analog Computing In-Memory Macro with Charge-Domain Saliency Detector
S. Ando, S. Miyagi, W. Zhang, Y.-C. Chen, K. Yoshioka
ESSERC
2025ComputingAcc. ~50%
GSMM: Efficient Global Sparsification for Resource-Conscious Multimodal Models
W. Zhang et al.
ICASSP
2025ComputingAcc. 25%Best Paper Award
LiSA: Leveraging Link Recommender to Attack Graph Neural Networks via Subgraph Injection
W. Zhang, E. Dai, K. Yoshioka
PAKDD
2025Sensing
BasketLiDAR: The First LiDAR-Camera Multimodal Dataset for Professional Basketball MOT
R. Hayashi, K. Torimi, R. Nagata, K. Ikeda, O. Sako, T. Nakamura, M. Tani, Y. Aoki, K. Yoshioka
MMSports
Project GitHub
2025SensingAcc. 48%
Poster: Discovering Sensor-Fusion Vulnerabilities in Autonomous Driving Systems against LiDAR Attacks
R. Yoshida, T. Sato, Y. Hayakawa, R. Suzuki, K. Ikeda, O. Sako, R. Nagata, K. Yoshioka
NDSS Poster Session
2025SensingAcc. 38%
SLAMSpoof: Practical LiDAR Spoofing Attacks on Localization Systems Guided by Scan Matching Vulnerability Analysis
R. Nagata, K. Koide, Y. Hayakawa, R. Suzuki, K. Ikeda, O. Sako, Q. Chen, T. Sato, K. Yoshioka
IEEE ICRA
arXiv GitHub
2025SensingAcc. 15%
On the Realism of LiDAR Spoofing Attacks against Autonomous Driving Vehicle at High Speed and Long Distance
T. Sato*, R. Suzuki*, Y. Hayakawa*, K. Ikeda, O. Sako, R. Nagata, R. Yoshida, Q. Chen, K. Yoshioka
NDSS
* co-first authors
Paper Project Press
2025Analog circuits
A 4.6-373K Functional 800MS/s 12b Buffer-then-Amplify Charge-Pump-Based Pipelined TI-SAR ADC with Integrated-Active-Hold Technique
K. Yamashita, K. Yoshioka, C. Ziegler, V. Issakov, H. Ishikuro
IEEE CICC
2024Computing
A Saliency-Aware Analog Computing-In-Memory Macro with SAR-Embedded Saliency Detection Technique
S. Ando, S. Miyagi, W. Zhang, Y.-C. Chen, K. Yoshioka
SSDM
2024ComputingAcc. 24%
PACiM: A Sparsity-Centric Hybrid Compute-in-Memory Architecture via Probabilistic Approximation
W. Zhang, S. Ando, Y.-C. Chen, S. Miyagi, S. Takamaeda-Yamazaki, K. Yoshioka
ICCAD
Paper GitHub
2024Computing
HALO-CAT: A Hidden Network Processor with Activation-LOcalized CIM Architecture and Layer-Penetrative Tiling
Y.-C. Chen, S. Ando, D. Fujiki, S. Takamaeda-Yamazaki, K. Yoshioka
arXiv preprint
arXiv
2024ComputingAcc. 26%
A 818-4094 TOPS/W Capacitor-Reconfigured CIM Macro for Unified Acceleration of CNNs and Transformers
K. Yoshioka
ISSCC
Paper Press
2024ComputingAcc. 29%
OSA-HCIM: On-The-Fly Saliency-Aware Hybrid SRAM CIM with Dynamic Precision Configuration
Y.-C. Chen, S. Ando, D. Fujiki, S. Takamaeda-Yamazaki, K. Yoshioka
IEEE ASP-DAC
arXiv
2024Sensing
Poster: Intensity-Aware Chosen Pattern Injection LiDAR Spoofing Attack
O. Sako, T. Sato, Y. Hayakawa, R. Suzuki, K. Ikeda, R. Nagata, Q. Chen, K. Yoshioka
NDSS Poster Session
2024SensingAcc. 44%
WIP: Towards Practical LiDAR Spoofing Attack against Vehicles Driving at Cruising Speeds
R. Suzuki, T. Sato, Y. Hayakawa, K. Ikeda, O. Sako, R. Nagata, Q. Chen, K. Yoshioka
VehicleSec
2024SensingAcc. 44%
WIP: An Adaptive High Frequency Removal Attack to Bypass Pulse Fingerprinting in New-Gen LiDARs
Y. Hayakawa, T. Sato, R. Suzuki, K. Ikeda, O. Sako, R. Nagata, Q. Chen, K. Yoshioka
VehicleSec
2024SensingAcc. 15%
LiDAR Spoofing Meets the New-Gen: Capability Improvements, Broken Assumptions, and New Attack Strategies
T. Sato*, Y. Hayakawa*, R. Suzuki*, Y. Shiiki*, K. Yoshioka, Q. Chen
NDSS
* co-first authors
Paper Project Press
2023SensingETAS Best Short/WIP Paper Award Runner-up
WIP: Practical Removal Attacks on LiDAR-based Object Detection in Autonomous Driving
T. Sato*, Y. Hayakawa*, R. Suzuki*, Y. Shiiki*, K. Yoshioka, Q. Chen
VehicleSec
* co-first authors
2023Analog circuitsMichael A. Zachariah Outstanding Student Paper Award
A 4.6K to 400K Functional PVT-Robust Ringamp-Based 250MS/s 12b Pipelined ADC with Pole-Aware Bias Calibration
K. Yamashita, B. Hershberg, K. Yoshioka, H. Ishikuro
IEEE CICC
2022Sensing
Towards Large-Scale Measurement Study on LiDAR Spoofing Attacks against Object Detection
T. Sato*, Y. Hayakawa*, R. Suzuki*, Y. Shiiki*, K. Yoshioka, Q. Chen
ACM CCS, Poster Session
* co-first authors
2021Sensing
Through the Looking Glass: Diminishing Occlusions in Robot Vision Systems with Mirror Reflections
K. Yoshioka, H. Okuni, T. T. Ta, A. Sai
IEEE IROS
arXiv
2020Sensing
A 2D-SPAD Array and Read-Out AFE for Next-Generation Solid-State LiDAR
T. T. Ta, H. Kubota, K. Kokubun, T. Sugimoto, M. Hirono, M. Sengoku, H. Katagiri, H. Okuni, S. Kondo, S. Ohtsuka, H. Kwon, K. Sasaki, Y. Ota, K. Suzuki, K. Kimura, K. Yoshioka, A. Sai, N. Matsumoto
IEEE Symposium on VLSI Circuits
2020SensingAcc. 32%
A 240×192 Pixel 10fps 70klux 225m-Range Automotive LiDAR SoC Using a 40ch 0.0036mm² Voltage/Time Dual-Data-Converter-Based AFE
S. Kondo, H. Kubota, H. Katagiri, Y. Ota, M. Hirono, T. T. Ta, H. Okuni, S. Ohtsuka, Y. Ojima, T. Sugimoto, H. Ishii, K. Yoshioka, K. Kimura, A. Sai, N. Matsumoto
ISSCC, pp.94-96
2019Computing
Dataset Culling: Towards Efficient Training of Distillation-Based Domain Specific Models
K. Yoshioka, E. Lee, S. Wong, M. Horowitz
IEEE ICIP, pp.3237-3241
arXiv GitHub
2018Computing
A 12.4 TOPS/W, 20% Less Gate Count Bidirectional Phase Domain MAC Circuit for DNN Inference Applications
Y. Toyama, K. Yoshioka, K. Ban, A. Sai, K. Onizuka
IEEE A-SSCC
2018ComputingAcc. 29%
PhaseMAC: A 14 TOPS/W 8bit GRO-based Phase Domain MAC Circuit for In-Sensor-Computed Deep Learning Accelerators
K. Yoshioka, Y. Toyama, K. Ban, D. Yashima, S. Maya, A. Sai, K. Onizuka
IEEE Symposium on VLSI Circuits, pp.263-264
2018SensingAcc. 33%
A 20ch TDC/ADC Hybrid SoC for 240×96-pixel 10%-reflection <0.125%-precision 200m-range Imaging LiDAR with Smart Accumulation Technique
K. Yoshioka et al.
ISSCC, pp.3026-3038
2018Analog circuitsAcc. 33%
An 802.11ax 4×4 Spectrum-Efficient WLAN AP Transceiver SoC Supporting 1024QAM with Frequency-Dependent IQ Calibration and Integrated Interference Analyzer
S. Kawai, K. Yoshioka et al.
ISSCC, pp.442-444
2017Analog circuitsAcc. 32%
A 0.7 V 12b 160MS/s 12.8 fJ/conv-step Pipelined-SAR ADC in 28nm CMOS with Digital Amplifier Technique
K. Yoshioka, T. Sugimoto, N. Waki, S. Kim, D. Kurose, H. Ishii, M. Furuta, A. Sai, T. Itakura
ISSCC, pp.478-479
2014Analog circuitsAcc. 22%
7-bit 0.8–1.2 GS/s Dynamic Architecture and Frequency Scaling Subrange ADC with Binary-Search/Flash Live Configuring Technique
K. Yoshioka, R. Saito, T. Danjo, S. Tsukamoto, H. Ishikuro
IEEE Symposium on VLSI Circuits, pp.932-945
2014Analog circuits
A 13b SAR ADC with Eye-Opening VCO-based Comparator
K. Yoshioka, H. Ishikuro
ESSCIRC, pp.411-414
2013Analog circuitsAcc. 27%
A 0.0058mm² 7.0 ENOB 24MS/s 17fJ/conv. Threshold Configuring SAR ADC with Source Voltage Shifting and Interpolation Technique
K. Yoshioka, A. Shikata, R. Sekimoto, T. Kuroda, H. Ishikuro
IEEE Symposium on VLSI Circuits, pp.266-267
2013Analog circuitsSpecial Feature Award
A 0.35-0.8 V 8b 0.5-35MS/s 2bit/step Extremely-Low Power SAR ADC
K. Yoshioka, A. Shikata, R. Sekimoto, T. Kuroda, H. Ishikuro
ASP-DAC
2012Analog circuitsBest Design Award
A 40nm CMOS Full Asynchronous Nano-Watt SAR ADC with 98% Leakage Power Reduction by Boosted Self Power Gating
R. Sekimoto, A. Shikata, K. Yoshioka, T. Kuroda, H. Ishikuro
IEEE A-SSCC
2012Analog circuits
An 8bit 0.35–0.8 V 0.5–30MS/s 2bit/step SAR ADC with Wide Range Threshold Configuring Comparator
K. Yoshioka, A. Shikata, R. Sekimoto, T. Kuroda, H. Ishikuro
ESSCIRC

Awards

2026/9dlab-VDEC Design Award, Excellence Prize
dlab Design Forum
2026/9MIRU Outstanding Student Award
Neural Reconstruction of LiDAR Point Clouds under Jamming Attacks via Full-Waveform Representation and Simultaneous Laser Sensing
MIRU 2026
2026/8Best Demo Award
Demo: Controlling Depth Estimation in Stereo Cameras with Projected Patterns
VehicleSec 2026
2026/3Excellent Student Author Award
BitROM: Weight-Reload-Free CiROM Architecture Towards Billion-Parameter 1.58-bit LLM Inference
IEICE VLD / ASP-DAC
2025/10Best Poster Award
A High-Speed 8-Bit Single-Channel SAR ADC with Tailored Bit Intervals and Split Capacitors
IEEE ICCE-Asia 2025
2025/8Excellent Reviewer Award
Symposium on Vehicle Security and Privacy 2025
2025/6Best Paper Award
LiSA: Leveraging Link Recommender to Attack Graph Neural Networks via Subgraph Injection
PAKDD 2025
2025/3Telecom System Technology Award
A 818-4094 TOPS/W Capacitor-Reconfigured CIM Macro for Unified Acceleration of CNNs and Transformers
Telecommunications Advancement Foundation
2023/5Michael A. Zachariah Outstanding Student Paper Award
A 4.6K to 400K Functional PVT-Robust Ringamp-Based 250MS/s 12b Pipelined ADC
IEEE CICC
2023/2ETAS Best Short/WIP Paper Award Runner-up
WIP: Practical Removal Attacks on LiDAR-based Object Detection in Autonomous Driving
VehicleSec
2020/71st Place (out of 1010 teams)
Prostate cANcer graDe Assessment (PANDA) Challenge
Kaggle
2013/10Best Design Award
A 40nm CMOS Full Asynchronous Nano-Watt SAR ADC
IEEE A-SSCC
2013/1Special Feature Award
A 0.35-0.8V 8b 0.5-35MS/s 2bit/step Extremely-Low Power SAR ADC
IEEE ASP-DAC

Grants and funding

Creating actively sensed spaces with a four-in-one laser
2026.10–2031.3JST CRONOSPrincipal Co-Researcher
Senrigan: infrastructure-integrated autonomous driving for micromobility
2026.10–2029.3JST-NSF VINESPrincipal Co-Researcher
Design technology for mixed analog-digital edge AI SoCs
2025.12–2030.2JST Next-Generation Edge AI Semiconductor ProgramGroup Leader
A framework for reducing VLSI design effort in advanced CMOS processes
2025.12–2030.3JST ASPIRE TopPrincipal Co-Researcher
Secure LiDAR through hardware-software co-design
2024.04–2028.03KAKENHI Grant-in-Aid for Scientific Research (B)Principal Investigator
Security evaluation and defense for AI-driven cyber-physical systems
2023.10–2029.03JST CRESTPrincipal Co-Researcher
Stochastic computing founded on the thermodynamics of fluctuation
2023.04–2027.03KAKENHI Grant-in-Aid for Scientific Research (A)Co-Researcher
Sensor security research crossing cyber and physical domains
2022.09–2026.03JST PRESTO (ICT Foundation)Principal Investigator
D3-AI: distributed machine learning attuned to diversity and changing environments
2021.09–2027.03JST CRESTPrincipal Co-Researcher
LiDAR based Sensing System Focused on Privacy Preserving and Occlusions
2021.08–2023.03KAKENHI Grant-in-Aid for Research Activity Start-upPrincipal Investigator

Industry sponsors

株式会社アイシン (Aisin Corp.)
ソニーセミコンダクタソリューションズ株式会社 (Sony Semiconductor Solutions)
TSMC

Media coverage

自動運転ラボ2025/03
慶応の学生ら、走行中の自動運転センサーを無効化　「脆弱性」を発見
GIZMODO2025/02
自動運転車のセンサー、遠距離からの攻撃で無効化できちゃうかも
日経クロステック2024/03
AI推論の新半導体が続々、電力効率改善へ注目3選
Tech Xplore2024/03
Autonomous vehicle technology vulnerable to road object spoofing and vanishing attacks
PC Watch2024/02
ISSCC 2024の発表論文数から見る、日の丸半導体復活への兆し
日経クロステック2024/02
自動運転用LiDARに脆弱性、慶応大らがHFR攻撃で物体消失を確認
EE Times2024/02
アナログCIM回路でCNNとTransformerの処理を実現
IEEE Spectrum
Toshiba's Light Sensor Paves the Way for Cheap Lidar
Google AI Blog
An International Scientific Challenge for the Diagnosis and Gleason Grading of Prostate Cancer

Patents

Over 30 patents filed and granted on integrated circuits and LiDAR systems.

Google Patents

Publications

Journal30

A 65-nm Compute-in-Read-Only-Memory Macro With Bidirectional Ternary Weight Storage and Sparsity-Aware Local Accumulation for 1.58-bit LLM Inference

MCRA: Multi-Column Residue Accumulation Analog Compute-in-Memory Architecture with Time-Domain M-Input ΣΔ ADC

ASiM: Improving Transparency of SRAM-based Analog Compute-in-Memory Research with an Open-Source Simulation Framework

LiDAR Beacon: 300 m-Range Fiducial Marker for Mobile Robot Localization with Dual Temporal Range–Reflectance Modulation

Optical LiDAR Communication: Repurposing Existing LiDAR Sensors for Infrastructure-to-Vehicle Communication

From Lab to Road: Realizing and Detecting LiDAR Spoofing Attacks against Autonomous Vehicles at High-Speed and Long-Distance

Breaking the Shield: Systematic Security Analysis on Pulse Fingerprinting LiDAR Systems for Autonomous Driving

A 4.2–373 K Functional 800 MS/s 12 b Buffer-then-Amplify Charge-Pump-Based Pipelined TI-SAR ADC with Integrated Active-Hold Technique

A High-Speed 8-Bit Single-Channel SAR ADC with Tailored Bit Intervals and Split Capacitors

A 0.6 V 68.2 dB 0.42 µW SAR-ΣΔ ADC for ASIC Chip in 0.18 µm CMOS

大規模言語モデルにおける半導体の課題と解決技術

A Saliency-Aware Analog Computing In-Memory with SAR-Embedded Detection Achieving 18.5% Power Reduction

A 818-4094 TOPS/W Capacitor-Reconfigured Analog CIM for Unified Acceleration of CNNs and Transformers

A 4.6 K to 400 K Functional Ringamp-Based 250 MS/s 12 b Pipelined ADC with PVT-Robust Unity-Gain-Frequency-Aware Bias Calibration

A Review of SRAM-based Compute-in-Memory Circuits

深層学習と民生用3Dセンサを用いた低コスト高精度肘関節可動域自動計測の試み

完全Web化された医工連携の試み：関節可動域自動計測システムの開発

Towards Reliable LiDARs for Autonomous Driving: A Review of High-Resolution and Security Features

Artificial intelligence for diagnosis and Gleason grading of prostate cancer: the PANDA challenge

Time-Based Current Source: A Highly Digital Robust Current Generator for Switched Capacitor Circuits

A Tutorial and Review of Automobile Direct ToF LiDAR SoCs: Evolution of Next-Generation LiDARs

VCO-based Comparator: A Fully Adaptive Noise Scaling Comparator for High-Precision and Low-Power SAR ADCs

A 240×192 Pixel 10fps 70klux 225m-Range Automotive LiDAR SoC Using a 40ch 0.0036mm² Voltage/Time Dual-Data-Converter-Based AFE

An 8 Bit 12.4 TOPS/W Phase-Domain MAC Circuit for Energy-Constrained Deep Learning Accelerators

Digital Amplifier: A Power-Efficient and Process-Scaling Amplifier for Switched Capacitor Circuits

A 20-ch TDC/ADC Hybrid Architecture LiDAR SoC for 24096 Pixel 200-m Range Imaging With Smart Accumulation Technique and Residue Quantizing SAR ADC

An 802.11ax 4×4 Spectrum-Efficient WLAN AP Transceiver SoC Supporting 1024QAM with Frequency-Dependent IQ Calibration and Integrated Interference Analyzer

Dynamic Architecture and Frequency Scaling in 0.8–1.2 GS/s 7 b Subranging ADC

An 8 bit 0.3–0.8 V 0.2–40 MS/s 2-bit/step SAR ADC with Successively Activated Threshold Configuring Comparators in 40 nm CMOS

A 0.5-V 5.2-fJ/conversion-step Full Asynchronous SAR ADC with Leakage Power Reduction down to 650 pW by Boosted Self-Power Gating in 40-nm CMOS

Conference52

Detect in Any Scene: An Agentic Framework for Object Detection with Experience-Aware Reasoning

The First CMOS-Integrated Stochastic Processing Unit for Scalable Thermodynamic Computing in 65nm with 1000x Power Efficiency Improvement

Dual-Purpose Spinning Current Circuit for Simultaneous Offset Cancellation and EMI Attack Detection in Hall-Effect Current Sensors

SNNQ: Post-Training Quantization Towards Ultra Low-Bit and Fast Spiking Neural Networks

D4C: Data-free Quantization for Contrastive Language-Image Pre-training Models

BitROM: Weight Reload-Free CiROM Architecture Towards Billion-Parameter 1.58-bit LLM Inference

Lights, Camera, Malfunction: When Illumination Robustness Leaves VLA Models Blind to Color

Towards Real-Time Full-Waveform LiDAR Transformers via Intensity-Guided Token Reduction and Physics-Aware Augmentation

Neural Reconstruction of LiDAR Point Clouds under Jamming Attacks via Full-Waveform Representation and Simultaneous Laser Sensing

Demo: Controlling Depth Estimation in Stereo Cameras with Projected Patterns

Demo: Real-World Reconstruction of LiDAR Perception under Jamming Attacks

Illusion of Depth: Revealing Hidden Stereo Vision Vulnerabilities in Depth Estimation

Ghost-FWL: A Large-Scale Full-Waveform LiDAR Dataset for Ghost Detection and Removal

D-SLAMSpoof: An Environment-Agnostic LiDAR Spoofing Attack using Dynamic Point Cloud Injection

MirrorDrift: Actuated Mirror-Based Attacks on LiDAR SLAM

HEMA-CIM: A Dual-Macro Hybrid-Domain CIM Architecture for Energy-Efficient FP MAC Operations in Edge AI

AHCPTQ: Accurate and Hardware-Compatible Post-Training Quantization for Segment Anything Model

A 4541 TOPS/W Saliency-Aware Analog Computing In-Memory Macro with Charge-Domain Saliency Detector

GSMM: Efficient Global Sparsification for Resource-Conscious Multimodal Models

LiSA: Leveraging Link Recommender to Attack Graph Neural Networks via Subgraph Injection

BasketLiDAR: The First LiDAR-Camera Multimodal Dataset for Professional Basketball MOT

Poster: Discovering Sensor-Fusion Vulnerabilities in Autonomous Driving Systems against LiDAR Attacks

SLAMSpoof: Practical LiDAR Spoofing Attacks on Localization Systems Guided by Scan Matching Vulnerability Analysis

On the Realism of LiDAR Spoofing Attacks against Autonomous Driving Vehicle at High Speed and Long Distance

A 4.6-373K Functional 800MS/s 12b Buffer-then-Amplify Charge-Pump-Based Pipelined TI-SAR ADC with Integrated-Active-Hold Technique

A Saliency-Aware Analog Computing-In-Memory Macro with SAR-Embedded Saliency Detection Technique

PACiM: A Sparsity-Centric Hybrid Compute-in-Memory Architecture via Probabilistic Approximation

HALO-CAT: A Hidden Network Processor with Activation-LOcalized CIM Architecture and Layer-Penetrative Tiling

A 818-4094 TOPS/W Capacitor-Reconfigured CIM Macro for Unified Acceleration of CNNs and Transformers

OSA-HCIM: On-The-Fly Saliency-Aware Hybrid SRAM CIM with Dynamic Precision Configuration

Poster: Intensity-Aware Chosen Pattern Injection LiDAR Spoofing Attack

WIP: Towards Practical LiDAR Spoofing Attack against Vehicles Driving at Cruising Speeds

WIP: An Adaptive High Frequency Removal Attack to Bypass Pulse Fingerprinting in New-Gen LiDARs

LiDAR Spoofing Meets the New-Gen: Capability Improvements, Broken Assumptions, and New Attack Strategies

WIP: Practical Removal Attacks on LiDAR-based Object Detection in Autonomous Driving

A 4.6K to 400K Functional PVT-Robust Ringamp-Based 250MS/s 12b Pipelined ADC with Pole-Aware Bias Calibration

Towards Large-Scale Measurement Study on LiDAR Spoofing Attacks against Object Detection

Through the Looking Glass: Diminishing Occlusions in Robot Vision Systems with Mirror Reflections

A 2D-SPAD Array and Read-Out AFE for Next-Generation Solid-State LiDAR

A 240×192 Pixel 10fps 70klux 225m-Range Automotive LiDAR SoC Using a 40ch 0.0036mm² Voltage/Time Dual-Data-Converter-Based AFE

Dataset Culling: Towards Efficient Training of Distillation-Based Domain Specific Models

A 12.4 TOPS/W, 20% Less Gate Count Bidirectional Phase Domain MAC Circuit for DNN Inference Applications

PhaseMAC: A 14 TOPS/W 8bit GRO-based Phase Domain MAC Circuit for In-Sensor-Computed Deep Learning Accelerators

A 20ch TDC/ADC Hybrid SoC for 240×96-pixel 10%-reflection <0.125%-precision 200m-range Imaging LiDAR with Smart Accumulation Technique

An 802.11ax 4×4 Spectrum-Efficient WLAN AP Transceiver SoC Supporting 1024QAM with Frequency-Dependent IQ Calibration and Integrated Interference Analyzer

A 0.7 V 12b 160MS/s 12.8 fJ/conv-step Pipelined-SAR ADC in 28nm CMOS with Digital Amplifier Technique

7-bit 0.8–1.2 GS/s Dynamic Architecture and Frequency Scaling Subrange ADC with Binary-Search/Flash Live Configuring Technique