日本語

Contact

Lab visits, graduate study, research collaboration — feel free to get in touch.

Email

kyoshioka47@keio.jp

Kentaro (Ken) Yoshioka

Address

〒223-8522

Yagami Campus Bldg. 23, 3-14-1 Hiyoshi, Kohoku-ku, Yokohama, Kanagawa 223-8522, Japan

Students: 23-214, 14-305, 24-318 / PI: 23-216A

Yoshioka Lab · Keio University

Transforming the world
with circuits and sensing.

Autonomous vehicles, working robots, remote healthcare — technologies once confined to science fiction. The Computing and Sensing Group works at the frontier that makes them real.

Illustration of people, autonomous vehicles and robots living atop a circuit board
50+
Publications
30+
Patents
9
JSSC papers
5
ISSCC papers
Published atISSCCNDSSCVPRNeurIPSICCVIROSICRAICCADJSSCTVLSIASP-DAC

News

What's new

View all →

Why CSG

What you get at CSG

This is not a lab where you only write papers. Here is concretely what you will experience if you join as an undergraduate or master's student.

You tape out real silicon

Research doesn't stop at simulation. Circuits designed by students are fabricated in real semiconductor processes, measured, and published. We have tape-outs in 65nm, 28nm, and 12nm FinFET, supported by TSMC.

5 ISSCC · 9 JSSC papers

You attack and defend real vehicles

We build our own LiDAR attack rigs and validate them against actual driving autonomous vehicles — and sometimes design the LiDAR sensors themselves. Only a handful of labs worldwide work at this level.

NDSS two years running

You engage the world directly

Every member aims to present at international venues. We run joint projects with UC Irvine, University of Florida, Nanjing University, Southeast University, Sony, and Aisin — and host visiting students from abroad.

NeurIPS · CVPR · ICCV · NDSS · IROS · ICRA

Your work reaches the public

Our research has been covered by GIZMODO, Nikkei xTECH, IEEE Spectrum, and Tech Xplore, in Japan and abroad. We actively issue press releases.

15+ media features

You can start from zero

Prior programming or AI experience isn't required. Onboarding training and study sessions build the fundamentals and depth that last a career. What matters is the will to tackle both hardware and software.

You won't lack resources

We hold multiple large grants — two JST CREST projects, JST PRESTO, JST ASPIRE, the Next-Gen Edge AI program, and KAKENHI (B). Fabrication and conference travel are covered so you can focus on research.

Projects

Featured work

View all →

FLARE & ChromaGuard

Vision-Language-Action models have become a powerful paradigm for general-purpose robot manipulation, but moving them into the real world exposes a vulnerability to minor environmental perturbations. FLARE is an optimized physical spotlight attack that exploits this through targeted illumination, dropping baseline task success rates to zero without any access to model internals. Adversarial training is the standard countermeasure — but it hides a pitfall. Naive data augmentation conditions VLA models to treat color as noise, collapsing their perception into a purely shape-biased processor. A diagnostic grayscale evaluation exposes the damage: the defended model keeps high success rates on grayscale inputs while its success on benign, color-dependent tasks falls to at most 47.5%, below the undefended baseline. ChromaGuard is a chroma-preserving adversarial training method that closes the gap. On a physical 6-DoF robotic platform it reaches 97.5% success on benign color-dependent tasks and 92.5% under attack.

Ghost-FWL

The first large-scale annotated mobile full-waveform LiDAR dataset for ghost artifact detection and removal, with 24,412 frames and 7.5 billion peak-level annotations — 100× more than prior work. Ghost points arise from multi-path reflections off glass and reflective surfaces, degrading 3D mapping and object detection in autonomous driving. Includes FWL-MAE pretraining and transformer-based detection baselines across Ghost, Object, Glass, and Noise categories.

AHCPTQ

Enables the first functional 4-bit post-training quantization of the Segment Anything Model (SAM) via two hardware co-designed innovations: Hybrid Log-Uniform Quantization (HLUQ) for heavy-tailed post-GELU activations, and Channel-Aware Grouping (CAG) cutting on-chip register overhead by 99.7%. FPGA deployment achieves 7.89× speedup and 8.64× energy efficiency over float at W4A4 with 36.6% mAP.

From Keio to the world.

We welcome lab visits from undergraduates, and we're recruiting Ph.D. students, post-docs, and industry collaborations. Feel free to reach out.